Scala-based Hardware Design and Chip Generation

14 repos

Scala libraries and frameworks for designing and generating digital hardware, particularly RISC-V processors and SoCs using high-level hardware description languages. The cluster centers on Chisel, a Scala-based HDL, and its application in processor design through projects like Rocket Chip, BOOM, and Chipyard—all of which enable more abstract, composable chip design compared to traditional Verilog or VHDL. Includes supporting tools, compiler infrastructure, and simulation frameworks for hardware development.

Scala · 9

Python · 2

C++ · 1

Shell · 1

SystemVerilog · 1

rtl ·22,940

chisel ·22,172

chip-generator ·19,701

scala ·19,549

riscv ·13,366

rocket-chip ·12,364

verilog ·10,576

firrtl ·10,322

chisel3 ·9,574

boom ·4,626

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