Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation
Verilog
301
35 commits
updated Feb 11, 2024
Verilog
62.9%
C
31.1%
Makefile
5.7%
Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation
Verilog
301
35 commits
updated Feb 11, 2024
Verilog
62.9%
C
31.1%
Makefile
5.7%