damdoy/ice40_ultraplus_examples

Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation

Verilog

301

35 commits

updated Feb 11, 2024

See the code
fpga
ice40
risc-v
verilog

Contributors

damdoy

32 commits

secworks

3 commits

damdoy/ice40_ultraplus_examples

Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation

Verilog

301

35 commits

updated Feb 11, 2024

See the code
fpga
ice40
risc-v
verilog

Contributors

damdoy

32 commits

secworks

3 commits

Languages

Verilog

62.9%

C

31.1%

Makefile

5.7%