(Toy) Compiler Infrastructure influenced by LLVM written in Rust
Rust
401
893 commits
updated Dec 15, 2020
Compiler Infrastructure influenced by LLVM written in Rust
Do not expect too much stuff!
Requirement: Rust nightly
cargo test --features x86_64 # build for x86_64
cargo test brainfuxk --features x86_64 --release -- --nocapture # this is fun. just try it.
cargo test --features aarch64 # build for aarch64. a few features are implemented.
cargo test --features riscv64 # currently doesn't work. need help.
cargo test demo --features $ARCH -- --nocapture # $ARCH is x86_64 or aarch64
let fibo = sericum_ir!(m; define [i32] f [(i32)] {
entry:
cond = icmp le (%arg.0), (i32 2);
br (%cond) l1, l2;
l1:
ret (i32 1);
l2:
a1 = sub (%arg.0), (i32 1);
r1 = call f [(%a1)];
a2 = sub (%arg.0), (i32 2);
r2 = call f [(%a2)];
r3 = add (%r1), (%r2);
ret (%r3);
});
./minilang and ./sericumcc may help you.
Rust
99.3%
(Toy) Compiler Infrastructure influenced by LLVM written in Rust
Rust
401
893 commits
updated Dec 15, 2020
Compiler Infrastructure influenced by LLVM written in Rust
Do not expect too much stuff!
Requirement: Rust nightly
cargo test --features x86_64 # build for x86_64
cargo test brainfuxk --features x86_64 --release -- --nocapture # this is fun. just try it.
cargo test --features aarch64 # build for aarch64. a few features are implemented.
cargo test --features riscv64 # currently doesn't work. need help.
cargo test demo --features $ARCH -- --nocapture # $ARCH is x86_64 or aarch64
let fibo = sericum_ir!(m; define [i32] f [(i32)] {
entry:
cond = icmp le (%arg.0), (i32 2);
br (%cond) l1, l2;
l1:
ret (i32 1);
l2:
a1 = sub (%arg.0), (i32 1);
r1 = call f [(%a1)];
a2 = sub (%arg.0), (i32 2);
r2 = call f [(%a2)];
r3 = add (%r1), (%r2);
ret (%r3);
});
./minilang and ./sericumcc may help you.
Rust
99.3%