jop-devel/jop

JOP is a Java processor for real-time systems

Java

131

2,976 commits

updated May 28, 2014

www.jopdesign.com

See the code

README

JOP stands for Java Optimized Processor. JOP is a Java processor
intended for embedded real-time systems.

Not written in Markdown, so it's shown here as plain text — view it formatted on GitHub.

Contributors

1,980 commits

366 commits

244 commits

171 commits

Similar repos

m0smith/malabar-mode

EMCS JVM Integration for Java and other JVM based languages

325

google/turbine

rxin/jvm-readings

JVM readings

489

forax/pro

A Java build tool that works seamlessly with modules

104

JarCar1/jar_llm

cdis-vm/cdis2java

A compiler from cdis to Java bytecode capable of exporting standalone Jars and more

jeandle/jeandle-jdk

Jeandle is a Just-in-Time compiler for Java. It is built on OpenJDK and leverages the LLVM compiler…

483

frenetic-lang/frenetic

The Frenetic Programming Language and Runtime System

229

Languages

Java

81.3%

VHDL

9.5%

TeX

4.3%

Tcl

1.3%

Verilog

1.1%

jop-devel/jop

JOP is a Java processor for real-time systems

Java

131

2,976 commits

updated May 28, 2014

www.jopdesign.com

See the code

README

JOP stands for Java Optimized Processor. JOP is a Java processor
intended for embedded real-time systems.

Not written in Markdown, so it's shown here as plain text — view it formatted on GitHub.

Similar repos

m0smith/malabar-mode

EMCS JVM Integration for Java and other JVM based languages

325

google/turbine

rxin/jvm-readings

JVM readings

489

forax/pro

A Java build tool that works seamlessly with modules

104

JarCar1/jar_llm

cdis-vm/cdis2java

A compiler from cdis to Java bytecode capable of exporting standalone Jars and more

jeandle/jeandle-jdk

Jeandle is a Just-in-Time compiler for Java. It is built on OpenJDK and leverages the LLVM compiler…

483

frenetic-lang/frenetic

The Frenetic Programming Language and Runtime System

229

Contributors

1,980 commits

366 commits

244 commits

171 commits

Languages

Java

81.3%

VHDL

9.5%

TeX

4.3%

Tcl

1.3%

Verilog

1.1%