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hexratcc/sup

RISC-V Instruction superoptimizer

Cuda

1

100 commits

updated Jun 6, 2026

See the code

README

sup [wip]

Instruction superoptimizer accelerated with CUDA.

build

nix-shell
./build
./out/sup

benchmarks

Currently gathered by ./out/sup ./test/addmul.s -e rv32i, rv32m.

GPUEnumerate (cand/sec)Filter (cand/sec)
GTX 10704800M5000M

resources

Contributors

hexratcc

100 commits

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hexratcc/sup

RISC-V Instruction superoptimizer

Cuda

1

100 commits

updated Jun 6, 2026

See the code

README

sup [wip]

Instruction superoptimizer accelerated with CUDA.

build

nix-shell
./build
./out/sup

benchmarks

Currently gathered by ./out/sup ./test/addmul.s -e rv32i, rv32m.

GPUEnumerate (cand/sec)Filter (cand/sec)
GTX 10704800M5000M

resources

Similar repos

Hmbown/reCUDA

CUDA/Triton kernel optimization and runtime patching for LLM inference

0

mangpo/greenthumb

93

google/souper

A superoptimizer for LLVM IR

2,385

Snowflake-AI-Research/fastkernels

6

SamGinzburg/VectorVisor

VectorVisor is a vectorizing binary translator for GPUs, designed to make it easy to run many…

160

slothy-optimizer/slothy

Assembly super-optimization via constraint solving

345

spzbrnmrc/Tiny-Vedas

RISC-V Infrastructure for AI Accelerators

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LCAI-TIHU/SW

LCAI-TIHU SW is a software stack of the AI inference processor based on RISC-V

23

Contributors

hexratcc

100 commits

Languages

Cuda

50.5%

C++

29.2%

C

11.8%

Shell

7.5%