Verilean/sparkle

A type-safe, formally verifiable HDL compiler in Lean 4. Inspired by Clash, built for high-assurance hardware synthesis.

Lean

119

1,075 commits

updated Sep 24, 2026

See the code
formal-verification
hardware-synthesis
hdl
lean4
risc-v

Contributors

junjihashimoto

1,059 commits

xiangze

7 commits

menik1126

4 commits

Languages

Lean

84.7%

Verilog

5.7%

C++

3.2%

SystemVerilog

1.5%

Shell

1.3%

Python

1.2%

C

1.1%

Verilean/sparkle

A type-safe, formally verifiable HDL compiler in Lean 4. Inspired by Clash, built for high-assurance hardware synthesis.

Lean

119

1,075 commits

updated Sep 24, 2026

See the code
formal-verification
hardware-synthesis
hdl
lean4
risc-v

Contributors

junjihashimoto

1,059 commits

xiangze

7 commits

menik1126

4 commits

Languages

Lean

84.7%

Verilog

5.7%

C++

3.2%

SystemVerilog

1.5%

Shell

1.3%

Python

1.2%

C

1.1%